COMMON WEAKNESS ENUMERATIONStable

CWE-1262

Improper Access Control for Register Interface

The product uses memory-mapped I/O registers that act as an interface to hardware functionality from software, but there is improper access control to those registers.

Abstraction

Base

Structure

Simple

Likelihood of Exploit

Medium

Understand the problem

What is the problem?

The product uses memory-mapped I/O registers that act as an interface to hardware functionality from software, but there is improper access control to those registers.

Extended description

Software commonly accesses peripherals in a System-on-Chip (SoC) or other device through a memory-mapped register interface. Malicious software could tamper with any security-critical hardware data that is accessible directly or indirectly through the register interface, which could lead to a loss of confidentiality and integrity.

Root cause

How and when does the problem arise?

Lifecycle phase

Architecture and Design

This weakness may be exploited if the register interface design does not adequately protect hardware assets from software.

Lifecycle phase

Implementation

Mis-implementation of access control policies may inadvertently allow access to hardware assets through the register interface.

Risk

What does successful exploitation lead to?

Read MemoryRead Application DataModify MemoryModify Application DataGain Privileges or Assume IdentityBypass Protection MechanismUnexpected StateAlter Execution Logic

Affected security scopes: Confidentiality, Integrity

Confidentiality of hardware assets may be violated if the protected information can be read out by software through the register interface. Registers storing security state, settings, other security-critical data may be corruptible by software without correctly implemented protections.

Defence

How is it prevented and fixed?

Architecture and Design

Architecture and design approach

Detail
Design proper policies for hardware register access from software.

Implementation

Implementation-phase defence

Detail
Ensure that access control policies for register access are implemented in accordance with the specified design.

Verification

How is it detected?

Manual Analysis

Moderate
This is applicable in the Architecture phase before implementation started. Make sure access policy is specified for the entire memory map. Manual analysis may not ensure the implementation is correct.

Manual Analysis

Moderate
Registers controlling hardware should have access control implemented. This access control may be checked manually for correct implementation. Items to check consist of how are trusted parties set, how are trusted parties verified, how are accesses verified, etc. Effectiveness of a manual analysis will vary depending upon how complicated the interface is constructed.

Simulation / Emulation

Moderate
Functional simulation is applicable during the Implementation Phase. Testcases must be created and executed for memory mapped registers to verify adherence to the access control policy. This method can be effective, since functional verification needs to be performed on the design, and verification for this weakness will be included. There can be difficulty covering the entire memory space during the test.

Formal Verification

High
Formal verification is applicable during the Implementation phase. Assertions need to be created in order to capture illegal register access scenarios and prove that they cannot occur. Formal methods are exhaustive and can be very effective, but creating the cases for large designs may be complex and difficult.

Automated Analysis

High
Information flow tracking can be applicable during the Implementation phase. Security sensitive data (assets) - for example, as stored in registers - is automatically tracked over time through the design to verify the data doesn't reach illegal destinations that violate the access policies for the memory map. This method can be very effective when used together with simulation and emulation, since detecting violations doesn't rely on specific scenarios or data values. This method does rely on simulation and emulation, so testcases must exist in order to use this method.

Architecture or Design Review

Moderate
Manual documentation review of the system memory map, register specification, and permissions associated with accessing security-relevant functionality exposed via memory-mapped registers.

Fuzzing

Moderate
Perform penetration testing (either manual or semi-automated with fuzzing) to verify that access control mechanisms such as the memory protection units or on-chip bus firewall settings adequately protect critical hardware registers from software access.